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ASEMBLER.DOC
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.XB:0
The IBM PC 6800/01/04/05/09/11 cross assemblers
GENERAL
The assemblers are named as*.exe where '*' is any of 0,
1, h1, 4, 5, HC5, 9, or 11 depending on which one you're
using. Command line arguments specify the filenames to
assemble.
The assemblers accept options from the command line to be
included in the assembly. These options are the
following:
l enable output listing.
nol disable output listing (default).
cre generate cross reference table.
s generate a symbol table.
c enable cycle count.
noc disable cycle count.
The command line looks like this :
as* file1 file2 ... [ - option1 option2 ...]
If this method of passing commands to the assembler is
used rather than the OPT pseudo op code, a space should
separate the minus sign from the last file name and the
first option. Example:
as5 program - l cre
This command assembles file 'program' with an output
listing and a cross reference table.
The `S1' formatted object file is placed in file
`filename.S19' (m.out on older versions). The listing
and error messages are written to the standard output.
If multiple files are assembled, the 'S1' file will be
placed under the first file's name.S19.
The listing file contains the address and bytes assembled
for each line of input followed by the original input
line (unchanged, but moved over to the right some). If
an input line causes more than 6 bytes to be output (e.g.
a long FCC directive), additional bytes (up to 64) are
listed on succeding lines with no address preceding them.
Equates cause the value of the expression to replace the
address field in the listing.
Equates that have forward references cause Phasing Errors
in Pass 2.
Expressions may consist of symbols, constants or the
character '*' (denoting the current value of the program
counter) joined together by one of the operators: +-
*/%&|^. The operators are the same as in C:
+ add
- subtract
* multiply
/ divide
% remainder after division
& bitwise and
| bitwise or
^ bitwise exclusive-or
Expressions are evaluated left to right and there is no
provision for parenthesized expressions. Arithmetic is
carried out in signed twos-complement integer precision
(16 bits on the IBM PC)
Constants are constructed with the same syntax as the
Motorola MDOS assembler:
' followed by ASCII character
$ followed by hexadecimal constant
@ followed by octal constant
% followed by binary constant
digit decimal constant
ERRORS
Error diagnostics are placed in the listing file just
before the line containing the error. Format of the
error line is:
File_name,Line_number: Error -> Description of error
or
File_name,Line_number: Warning --- Description of error
Errors of the first type in pass one cause cancellation
of pass two. Warnings do not cause cancellation of pass
two but should cause you to wonder where they came from.
Error messages are meant to be self-explanatory.
Finally, some errors are classed as fatal and cause an
immediate termination of the assembly. Generally these
errors occur when a temporary file cannot be created or
is lost during the assembly. Consult your local guru if
this happens.
DIFFERENCES
For indexed addressing, the comma is required before the
register; `inc x' and `inc ,x' are not the same.
Macros are not supported. (try M4 or M6)
The force size operators ('>' and '<') are implemented
for all assemblers.
The only pseudo-ops supported are:
ORG, FCC, FDB, FCB, EQU, RMB, BSZ, ZMB, FILL,
PAGE, END, and OPT.
The OPT pseudo-op allows the following operands:
nol Turn off output listing
l Turn on output listing (default)
noc Disable cycle counts in listing (default)
c Enable cycle counts in listing (clear
total cycles)
contc Re-enable cycle counts (don't clear total
cycles)
cre Enable printing of a cross reference
table
s generate a symbol table
Some of the more common pseudo-ops are not present:
SPC Use blank lines instead
TTL use `pr' to get headings and page numbers
NAM[E] Did you ever use this one anyway?
The above pseudo-ops are recognized, but ignored.
ZMB (Zero Memory Bytes) is equivalent to BSZ (Block Store
Zeroes). FILL can be used to initialize memory to
something other than zero:
FILL val,nbytes.
TARGET MACHINE SPECIFICS
(as0) 6800: Use for 6802 and 6808 too.
(as1) 6801: You could use this one for the 6800 and avoid LSRD,
ASLD, PULX, ABX, PSHX, MUL, SUBD, ADDD, LDD and
STD.
6301: Called ash1 (Hitachi 6801). Same as 6801 except
cycle times are reduced and a few new instructions
are added: XGDX, SLP, AIM, OIM, EIM, TIM.
Convenience mnemonics BSET, BCLR, BTGL, BCHG and
BTST are also present which generate appropriate
mask values:
BSET 4,dog --> OIM #10,dog
Bit manipulation using indexed addressing is
specified with a trailing ",x": aim #mask,index,x
or btgl 5,index,x.
(as4) 6804: The symbols 'a', 'x' and 'y' are predefined as $FF,
$80 and $81 respectively. Also defined as 'A', 'X'
and 'Y'. Because of the 6804 architecture, this
means that 'clr x' will work since the x register
is just a memory location. To use short-direct
addressing, the symbol involved must not be a
forward reference (i.e. undefined) and must be in
the range $80-$83.
Remember that bytes assembled in the range $10-$7F
will go into the data space; There is no program
space ROM for these locations.
The syntax for Register indirect addressing is as
follows:
mnemonic [<x>or<y>]
an example is:
lda [x]
The MVI instruction (move immediate) has its own
format :
mvi address,#data
where address is an 8-bit address in page zero,
and data is the value to be written to specified
location.
(as5) 6805: There is no 'opt cmos' pseudo, so be careful not to
use STOP or WAIT in a program that is destined for
an NMOS version of the 6805. The MUL instruction
should also be avoided on all versions of the 6805
except the C4. Cycle times are for the NMOS
versions.
(ashc5) 68HC05: Cycle times are for the 68HC05. Otherwise,
this assembler is identical to as5.
(as9) 6809: The SETDP pseudo-op is not implemented. Use the
'>' and '<' operators to force the size of
operands.
For compatibility, CPX is equal to CMPX.
(as11) 68HC11: Bit manipulation operands are separated by
blanks instead of commas since the 'HC11 has bit
manipulation instructions that operate on indexed
addresses.
DETAILS
Symbol: A string of characters with an initial non-
digit. The string of characters may be from the
set:
[a-z][A-Z]_.[0-9]$
( . and _ count as non-digits ). The `$' counts as
a digit to avoid confusion with hexadecimal
constants. All characters of a symbol are
significant, with upper and lower case characters
being distinct. The maximum number of characters
in a symbol is currently set at 15.
The symbol table has room for at least 2000 symbols
of length 8 characters or less.
Label: A symbol starting in the first column is a label
and may optionally be ended with a ':'. A label
may appear on a line by itself and is then
interpreted as:
Label EQU *
Mnemonic: A symbol preceded by at least one whitespace
character. Upper case characters in this field are
converted to lower case before being checked as a
legal mnemonic. Thus `nop', `NOP' and even `NoP'
are recognized as the same mnemonic.
Note that register names that sometimes appear at
the end of a mnemonic (e.g. nega or stu) must not
be separated by any whitespace characters. Thus
`clra' means clear accumulator A, but that `clr a'
means clear memory location `a'.
Operand: Follows mnemonic, separated by at least one
whitespace character. The contents of the operand
field is interpreted by each instruction.
Whitespace: A blank or a tab
Comment: Any text after all operands for a given
mnemonic have been processed or, a line beginning
with '*' or ';' up to the end of line or, an empty
line or, the remainder of a line after ';' (at
least one space or tab must precede the semicolon
if it is not the first character on the line)
FILES
filename.S19 S-record output file
STDOUT listing and errors (use redirection for
listing file)
Fwd_refs Temporary file for forward references.
IMPLEMENTATION NOTES
This is a classic 2-pass assembler. Pass 1 establishes
the symbol table and pass 2 generates the code.
12/11/84 E.J.Rupp
The ashc5 assembler was added in December, 1990. Except
for providing 68HC05 cycle times, ashc5 is identical to
as5.
This version of the cross assemblers updated by Greg
Thoman in July, 1990 and includes the correction and
enhancements made by Bruce Olney.
Previous version of the cross assemblers ported to the
IBM PC on 4/13/87.
The "older versions" mentioned above were ported to the
IBM PC on 7/25/85.